The present invention relates to microelectronic devices and methods for manufacturing and using microelectronic devices. More specifically, several aspects of the invention are directed toward interconnecting substrates that electrically couple microelectronic components, such as packaged microelectronic devices, to other components.
Printed circuit boards (PCBs) and interposing substrates are types of interconnecting substrates for electrically connecting microelectronic components together. In a typical application used in semiconductor manufacturing, a packaged microelectronic device includes an interconnecting substrate, a microelectronic die attached to the interconnecting substrate, and a protective casing covering the die. Such packaged microelectronic devices are generally known as Flip-Chip, Chip-On-Board, or Board-On-Chip devices. The interconnecting substrates used in packaged microelectronic devices typically include a plurality of contact elements coupled to bond-pads on the die, a plurality of ball-pads on at least one side of the interconnecting substrate, and conductive traces coupling each contact element to a corresponding ball-pad. Packaged microelectronic devices using an interconnecting substrate are generally surface mounted to another interconnecting substrate, such as a PCB, in the fabrication of Printed Circuit Assemblies (PCAs).
The competitive semiconductor manufacturing and printed circuit assembly industries are continually striving to miniaturize the microelectronic devices and the PCAs for use in laptop computers, hand-held computers, and communication products. Additionally, there is a strong drive to increase the operating frequencies of the microelectronic devices. The trends of miniaturization and high operating frequencies further drive the need to increase the density of traces and contacts on PCBs and other types of interconnecting substrates. Therefore, several high frequency packaged microelectronic devices require shielding to protect the integrity of the signals on the interconnecting substrate from capacitive coupling and/or inductive coupling.
In conventional PCB technologies, the signal integrity is protected by providing ground and power planes in the interconnecting substrates. Such use of ground and power planes in conventional interconnecting substrates has been limited to robust PCBs that are fairly thick. The miniaturization of components, however, often requires very thin interconnecting substrates for packaging microelectronic devices. One manufacturing concern of using ground and power planes in such thin interconnecting substrates is that high-temperature processing can cause voids to form in the substrates or delamination of the substrates. The substrates may also warp during high temperature processing.
To resolve the problems of voids, delamination and warping, the interconnecting substrates are typically preheated to remove moisture from the dielectric materials. One drawback of preheating the interconnecting substrates is that it is time-consuming and increases the cost of packaging microelectronic devices and fabricating PCAs. Additionally, although such preheating techniques are generally satisfactory for removing a sufficient amount of moisture from low-density, thick PCBs, preheating may still cause unacceptable voids or delamination in thin, high-density interconnecting substrates used in packaged microelectronic devices. The thicker conventional PCBs can have some voids and/or delamination without affecting the performance of the PCAs because they have sufficient structural integrity to prevent warpage and lower densities that are not likely affected by voids or slight delamination. In contrast to thick, low-density PCBs, the thin interconnecting substrates that are used in highly miniaturized applications may not have the structural integrity or sufficient open real estate to withstand preheating or subsequent high-temperature processing even after being preheated. Therefore, there is a need to develop a thin, high-density interconnecting substrate that can withstand high-temperature processes and is suitable for high density, high frequency applications.
The present invention is directed toward interconnecting substrates used in the manufacturing of microelectronic devices and printed circuit assemblies, packaged microelectronic devices having interconnecting substrates, and methods of making and using such interconnecting substrates. In one aspect of the invention, an interconnecting substrate comprises a first external layer having a first external surface, a second external layer having a second external surface, and a conductive core between the first and second external layers. The conductive core can have at least a first conductive stratum between the first and second external layers, and a dielectric layer between the first conductive stratum and one of the first or second external layers. The conductive core can also include a second conductive stratum such that the first conductive stratum is on a first surface of the dielectric layer and the second conductive stratum is on a second surface of the dielectric layer. The interconnecting substrate also has at least one vent through at least one of the first conductive stratum, the second conductive stratum, and/or the dielectric layer. The vent is configured to direct moisture away from the dielectric layer, and thus the vent can be a moisture release element that allows moisture to escape from the dielectric layer during high temperature processing.
The first conductive stratum can be a ground plane, and the second conductive stratum can be a power plane. Additionally, the vents can comprise holes and/or channels in the first and second conductive stratums. The holes and/or channels can be superimposed with one another, or they can be offset from one another. The vents are located in areas of the first and second conductive stratums that will not affect the electrical integrity of the conductive stratums or the internal wiring of the interconnecting substrate. For example, locations and configurations of the holes, channels or other types of vents can be designed so that they do not adversely affect the signal integrity.
In another aspect of the invention, a method of manufacturing an interconnecting substrate comprises constructing an internal conductive core by disposing a first conductive stratum on a first surface of a dielectric layer; forming at least one vent in at least one of the first conductive stratum and/or the dielectric layer so that the vent is configured to direct moisture away from the dielectric layer; and laminating the internal conductive core between a first external layer and a second external layer. The process of constructing the internal conductive core can also include disposing a second conductive stratum on a second surface of the dielectric layer that is opposite the first surface. The vents can be formed in the first conductive stratum and/or the second conductive stratum by etching holes, channels, and/or other openings through the first and/or second conductive stratums.